Virtualization is a processor feature, which assists hypervisor or virtual machine to virtualise more virtual systems onto a single physical platform. Intel Core i7-5820K supports VT-x, VT-d and EPT (nested paging). For more information on virtualisation, you could read http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-3c-par… or Intel® 64 and IA-32 Architectures Software Developer Manuals.
Yes, interesting 676 pages.
I think you should read the following:
New processor architecture
L1 cache: data and row
L2 cache: cache for each core
L3 cache: common cache for all cores
cachesize: could be calculated or measured
Cache control and cache alingment by integrated („router“) controller für L1 and L2 cache
integrated memory controller in processor with multi memory channels
parallel access to the external memory channels
optional integrated graphics unit with external HBM RAM (eventually pluggable modules) ~ 4GB RAM
Reduction of core frequency, when they are not under full load and reduction of supply voltage, too.
Eventually stepless – frequency and supply voltage. In any case, a sufficient number of steps (10?) to reach a „right“ matching of required and supplied computing power.
A small processor to coordinate all cores
Heatspreader manufactured of copper or brass
Serial number/code on the heatspreader (matted and then stamped) and in the die of the processor
Data transfer rate of the caches matching to the data transfer rate of the external RAM
Data transfer quadpumped (FSB of Intel Pentium 4)
Temperature sensor for monitoring of Die temperature
Utilization of Wheatstone bidge to have a linear relation between temperature and output signal, because semiconductor temperature senors are used, which generate a non-linear resistance signal.
Real multitasking per core: number of processes per core do increase. Probably 10 or more additional register sets per core. 10 or more possible processes per core. Must support scheduling – is ensured by saving the registers. Deleting processes is done by removing the instructions from the pipe. The pipe is better or fully loaded.
8 cores together with the 10 spererate register sets result in 80 possible parallel processes.
Instruction set: actual instruction set + FFT + ?
Bit width: 512 Bit
Adress range: 64TB or more (expected adress range of servers)
REG and ECC RAM support for external RAM (REG: decrease capacity load. ECC: error correction)
different core numbers and different core frequencies for different processor models
minimal core number: 8
several instructions with lower length (32, 64 or more) placed in 512 Bit width
coprocessor 512 Bit: several instrucions (32, 64 or more) placed in 512 Bit width
To reduce the thermal loss, the core frequency can be reduced and the core number can be increased. As like by mobile processors.
Construct and build a single processor core. Then measure the the thermal loss of the core at increasing core frequency and measure the minimum of the thermal loss. Then set the core frequency acordingly.
The maximal thermal loss of one processor is limited by the cooling power of the cooler having a temperature of ~37°C (body warm).
Was meinst du?
The above patent was send to your develop department, also.
I think you can read and write, too.
sorry, I could not read and write for your reply, because I do not even understand what you mean! Again, I am very sorry that I failed to solve your problems!
I found some useful information about virtualization that could help your inquiries.
It provides with an explanation of what is virtualization and how it works, including the instructions performed by the processor to achieve virtualization.
I hope this is good information for you.