0 Replies Latest reply: Dec 26, 2009 8:49 PM by rogerjowett RSS

intel 865pe msi 6728 neo 2 p version 2.0

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i have an msi 6728 intel 865pe neo 2p motherboard with an intel p4

im curious how to use the 4gb which both intel and msi claim the processor an motherboard support i have tried to install vista 64bit on th e motherboard thinking that a 64bit operating system was required to access more than 3½gb of ram under xp32bit however the os failed to install i assume this is because teh p4 is 32bit processor


here si the text from the chipset description and the picture is the diagram associated with the 865pe

it seems a shame that on top of the lost ½gb of ram i loose a further 2gb if i had an agp vga cardwith 1gb of ram on it + any further loss of ram when five more pci vga interfaces are connected

couldnt the piece of ram that windows xp 32 bit cant access be used by the agp aperture or pci vga devices would this require a new bios upgrade or is something more substantial required?


System Address Map 4
A processor system based on the 865PE/865P chipset supports 4 GB of
addressable memory space
and 64 KB+3 of addressable I/O space. There is a programmable memory
address space under the
1-MB region that is divided into regions that can be individually
controlled with programmable
attributes such as disable, read/write, write only, or read only.
Attribute programming is described
in Chapter3. This section focuses on how the memory space is
partitioned and the use of the
separate memory regions.
The Pentium 4 processor with 512-KB L2 cache on 0.13 micron process in
a 478-pin package
processor family and the
Pentium 4 processor 90 nm process support addressing of memory ranges
larger than 4 GB. The MCH claims any processor access over 4 GB and
terminates the transaction
without forwarding it to the hub interface or AGP (discarding the data
terminates writes). For
reads, the MCH returns all zeros on the host bus. Note that the
865PE/865P chipset platform does
not support the PCI Dual Address Cycle Mechanism; therefore, the
platform does not allow
addressing of greater than 4 GB on either the hub interface or AGP interface.
In the following sections, it is assumed that all of the compatibility
memory ranges reside on the
hub interface/PCI. The exception to this rule is VGA ranges, that may
be mapped to AGP. In the
absence of more specific references, cycle descriptions referencing
PCI should be interpreted as the
hub interface/PCI, while cycle descriptions referencing AGP are
related to the AGP bus.
The 865PE/865P chipset memory map includes a number of programmable ranges.
Note: All of these ranges must be unique and non-overlapping. There
are no hardware interlocks to
prevent problems in the case of overlapping ranges. Accesses to
overlapped ranges may produce
indeterminate results.
4.1System Memory Address Ranges
The MCH provides a maximum system memory address decode space of 4 GB.
The MCH does not
remap APIC memory space. The MCH does not limit system memory space in
hardware. It is the
BIOS or system designers responsibility to limit memory population so
that adequate PCI,
AGP, High BIOS, and APIC memory space can be allocated. Figure10
provides a simplified
system memory address map. Figure11 provides additional details on
mapping specific memory
regions as defined and supported by the MCH

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