I'm trying to write code to handle x87denormal operand exceptions, emulating the SSE2 DAZ mode, on a Pentium D processor. I have an issue that the processor behavior doesn't seem to match the Intel documentation. Can anyone help?
I'm running with denormal operand exceptions unmasked. The "Intel 64 and IA-32 Architectures Software Developer's Manual", volume 1, states (section 8.5.2) that in this situation, a denormal operand leaves the top of stack and source operands unchanged. What I actually see is that the "fld" instruction in my code appears to execute and load the denormal value onto the FPU stack before the exception is taken on the next FPU instruction. This is actually much more useful than the documented behavior, since it is then trivial to convert the loaded value into +0 or -0 as appropriate and resume the program.
My questions are:
1. Is the behavior I described correct, or am I dreaming?
2. Can this be relied upon in all processor versions?
(and probably not the right place, but...)
3. Is the behavior the same in AMD processors?
I'm running RedHat Linux, but I don't think that's relevant.