3 Replies Latest reply on Apr 7, 2015 8:22 AM by DiegoV_Intel

    How to maximize sampling rate using a TIADC128S052 (Analog to Digital Converter)

    PStark

      I am interfacing the Intel Edison via SPI port to an ADC. This device is Texas Instruments ADC18S052. I have created a code for estimating the maximum rate for data acquisition through SPI bus. My working code can be found on the next github repository:

       

      PabStark/Edison_ADC128S052 · GitHub

       

      The connection with the ADC is by using the ports in the edison via a level shifter (TXB0108) and the ADC CS line is tied to GND (continuous mode).

      The ADC support up to 1MSPS, and I want to achieve rates of 500KSPS. Is this possible using Intel Edison?

       

      With the little code exposed above I only managed to get around 9 KSPS.