I found this thread and I think it responds your question: Re: Use GPIO as TTL/CMOS pulse counter. According to the thread, the higher frequency that can be handled is about 10kHz. Please check the thread, there is a test code as well. You might find it interesting.
I have upgraded my code in the repo, this code performs iterative readings on the ADC only using ioctl (SPIDEV) calls.
Executing the code throws a pretty similar value as the one you mention in the thread. I managed to obtain 10 KHz (even though I achieved before (with mraa library) 15 KHz by modifying mraa priorities). Also I did managed to increase the sampling rate quite a lot by activating continuous sampling on my ADC and using a high rx buffer on the spi port, but as long as the buffer is full, which is only 4096 bytes, I cannot read anymore until some microseconds later (~100), My requirements are around 2 - 10 microseconds.
My point here is I was indicated by an Intel Customer Support representative (on a private email) that I was going to be able to read data from an analog signal at sampling rates of 200 KSPS. My case reference is 00066838 for the support issue. What I really want to know here is if there is any possibility on reaching the desired 200 - 500 KSPS rate for my project. Apparently the problem is not in the ADC (since is working perfectly well) but on the Intel Edison GPIO speeds. ¿Is there any way to use the Intel Quark microcontroller to achieve such ADC sampling rates? If the answers are negative, sadly I will have to migrate to another platform, and I am slightly disappointed with the customer support service since I already bought a couple of Intel Edison kits.
Currently the Quark is not activated. According to: Re: Setting GP48 to output or input on breakout will affect wifi, there will be a new release soon but I don't know if it will include some updates regarding the Quark.
I will check with the support team in order to know if they have some updates about the sample rate.