I'm not sure if the SSP2 can be configured to work with SPI instead I2S. Let me investigate about it and as soon as I can get some information I'll post it here.
I see that this guide at EmutexLabs explains that pinout of Arduino breakout uses IO10\IO11\IO12\IO13 that are connected to Linux GPIO 41,43,42,40 and stated that they can function as I2S or SPI.
Would be great if someone could confirm that.
There is an example in that article on EmutexLabs at the end (Example 5) that shows how to set up IO10-13 as SPI. So yes, they can function as a SPI bus.
Thanks for helping me David,
There are still few things that confuse me:
1. Why Intel Edison Module Hardware Guide states that there is "SPI: 1 controller with 2 chip selects" in Table 2 and through the whole document there is absolutely no word about using GP42, GP40, GP43, GP41 as SPI. In Table 5 with pin description the only alternate function is I2S for these pins. SPI2 is specified to be on pins GP109, GP110, GP114, GP115.
2. Also, on the page of EmutexLabs in Table 3: Pin Function Multiplexing Control for IO10, IO11, IO12, IO13 there are two GPIOs in the columns SoC Pin Modes | Pin | Linux. What does it mean? Where's the multiplexing done - on the breakout or on the SoC itself?
I'm completely confused about the SPI - is there one SPI controller that can work with different pins or are there two SPI controllers?
1. The naming convension is confusing. The "SPI: 1 controller" mentioned in the HG could also read "SPI: a single controller" i.e. there is only 1 SPI controller brought out on the 70-pin connector, and the pins are 109, 114, 115, with the chip selects being 110 and 111. That controller is SPI_2 (or SSP5 in the schematic).
Pins 40-43 are I2S, there's no mention in the Hardware Guide of them being able to support SPI, so I would assume not. Only GPIO or I2S.
2. There are two GPIO's shown in Table 3 of the muxing guide, because the header pin may be connected to one or the other depending on the muxing. And, for example, take GP40 and GP109, they are both separate pins on the 70-pin Hirose connector, which indicates that they are muxed on the breakout board.
So to summarise,
SPI: One controller with 2 CS pins
I2S: One controller
Which agrees with what the Hardware Guide says.
Hope this answers your question
Thank you very much David, now I've got some clarity in my mind about the SPI.
Still hope that it may be possible to use I2S-SSP as SPI since SSP IP cores usually are universal and can handle different interfaces depending on configration.
It is not possible to use SSP2 as SPI interface. SSP2 is connected to the audio engine, it only supports audio formats I2S master/SLAVE, PCM master or slave, left or right justified. I hope to have answered your question.