Firstly, I apologize if this is the wrong forum; I could not find any other more relevant.
I'm looking for clarification in regards to a statement made that asserts there is a 1-cycle difference between the instructions:
0x3B (cmp reg, mem)
0x39 (cmp mem, reg)
As the two are functionally equivalent, I assume it would have to have something to do with the decoding circuit logic, but would like clarification if this statement reigns true in the first place.
Additionally, if this is true, where would I be able to find documentation of such details? All of the manuals I've read (even the IA32 optimization manual) does not mention these things.
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