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The Edison Module Hardware Guide (Rev. 002) mentions that there is a "default" glitch-filter on the GPIO(s) up of five (5) clock cycles (Page 17). Could you please clarify if this is software selectable, or can be modified (a cursory search of the langwell linux drivers resulted in no clear answer)?
Also, some insight into the selection of 5 cycles would be useful in understanding if there are additional constraints associated with the inputs or if it's that this is a product that is targeted at hobbyists and therefore (what I consider) excessive filtering is recommended.
Thanks in advance - Mario.