I sent it through the Software Forum. I get the answer that my question belongs to the Chipset Forum..
I'll appreciate your help..
I think that power-up and PCIe link questions can be answered better by Chipses\Hardware fellows..
A summarized question is attached below.
Thank you again,
Using COM Express™, Intel® Core™ i7 Celeron processor, Intel® 5 Series HM55 chipset.
Also, An Altera™ Startix IV FPGA. is placed on the carrier.
Facing a PCIe "no communication" problem when Windows OS starts.
Can anybody draw guidelines for the Power-Up Sequence and/or using the PWR_OK signal and the SYS_RESET# signal?
What is the typical timing for the SYS_RESET#? What is the maximum period of time that a delay before PWR_OK can be set safely?
What should be the length of the pulse of SYS_RESET#?
Thank you very much in advance,
These types of issues are handling through different support division; the chipset team is in charge of RAID issues and chipset software problems. You may need to contact an Intel authorized distributor and work with field application engineer for more information at: