0 Replies Latest reply on Aug 8, 2009 7:35 AM by wuwei811204

    Implementing a SATA Controller base on FPGA

      I will graduated from Institute of Optics and Electronics Chinese Academic of Sciences Chengdu, China next year, so i am looking for a suited job. who is interested in my research can provide me a development opportunity.

       

      My email:  wuwei811204@126.com

       

      GTX realizes physical layer of SATA protocol. Link layer and transport layers are implemented in VHDL with programmable logic resources. Application layer is developed on POWERPC440 embedded in Xilinx Virtex-5 FPGA. In order to test the performance of SATA controller PLB2SATAIP, an Embedded SATA Storage (ESS) reference system has been created in virtex 5 platform .The ESS reference system has been implemented in a XC5VFX130T-2FF1738.

      The experiment results shows the maximal sustained orderly writing data transfer rate (writing data to SATA hard disk) up to 85-102 MB/s and reading data rate up to 94-111 MB/s. The other was the utilization of the SATA controller is shown in table 1.

      The results don’t mean that the effectual data transfer rate of SATA controller can not reach 120MB/s or higher because of the experimental results can not overstep the limit of sustained data transfer rate of SATA hard disk. The performance is limited by the SATA hard disk, not the SATA controller itself.

       

      Table 1

      Logic resources

      Used

      available

      utilization

      BUFDSs

      1

      10

      10%

      BUFGs

      8

      32

      25%

      DCM_ADVs

      2

      12

      16%

      GTX_DUALs

      1

      10

      10%

      RAMB36_EXP

      8

      298

      2%

      Slice Registers

      2224

      81920

      2%

      Flip Flops

      2223

      ------

      ------

      Latches

      1

      ------

      ------

      Slice LUTS

      2611

      81920

      3%

      Slice LUT-Flip Flop pairs

      3530

      81920

      4%