I am sorry you are having problems.
I regret to say Linux is not my strength. I would recommend you checking on Linux communities or maybe a Linux experience member from our community can provide some feedback on this.
Alienheartbeat, is it possible to share a screenshot of the SMART log showing these events?
Please share more information about your system, such as Intel® System Identification Utility or msinfo32 report (press Windows* key + R key, type “msinfo32”, press OK and then File, Export). You can attach it with the Advanced Editor.
@kevin_intel No Linux problem here - I am asking about the meaning of Smart events in the context of Intel SSDs.
@joe_intel I have attached as requested:
. the logs for sda and sdb (devstat-sdx-140730.lst)
. the full smart listing for these two devices (fulllist-sdx-140730.lst)
. A system information report done with hardInfo (I don't use Windows so can't use your utility).
If you require any further info about the system let me know.
fwiw for the mSata 530, I notice that the number of
Resets Between Cmd Acceptance and Completion
is the same as the number of
Number of Hardware Resets
and I suspect this is related to the line in the 'capabilities' section:
Abort Offline collection upon new command,
an issue which has been raised elsewhere in these forums.
Please let me know if you need any further information.
Alienheartbeat, I was able to find some information for you.
These “events” are actually Device Statistics as explained in the page 23, table 14 of the specifications document.
These three statistics do not have an equivalent SMART attribute but are explained below.
- ASR = Asynchronous Signal Recovery. An ASR event is recorded when the device recovers from a loss of signal or when communication is established after hot plug.
- The Number of Resets Between Command Acceptance and Command Completion statistic is a counter that records the number of Software Reset or Hardware Reset events that occur when one or more commands have been accepted by the device but have not reached command completion.
- The Number of Hardware Resets statistic is the number of hardware resets RECEIVED by the device. This means the reset came from the PC or laptop.
None of these indicate an issue with the Intel® SSD. They are events that happen in the normal course of operation. The one exception might be ASR events. Steadily increasing ASR events might indicate an issue with the SATA port or the SATA cable.
@joe_intel - thanks for those definitions.
I understand they are device statistics.
And thanks for the document linked, though it does not provide any clarification on normal values.
As for what they mean, I think the
Resets Between Command Acceptance and Command Completion on the mSata 530 seem ok,
as it equals the Number of Hardware Resets
and is probably related to the inability of the power-on self-test to complete becs it gets interrupted by real work,
as mentioned here
That leaves the high Number of Hardware Resets and Number of ASR Events on the Sata 730 SSD to think about.
While there are is only 1 Power-On reset daily,
there are about 10+ Hardware Resets and 3-5 ASR Events daily.
What causes an SSD Hardware Reset, besides a reboot or 'hot-plug'.
Any thoughts on what is behind these Hardware Resets and ASR Events?
I can confirm that going into Hibernate will cause ASR Events to increase and Number of Hardware Resets to increase by 2. You can confirm this by checking the SMARTCTL output before and after going into Hibernate mode.
thanks Kevin, that makes snese.
However, the last time I hibernated one of my machines was about 2006, just to test it,
Did not seem a useful facility.
I also rarely (about 1/month) put them to sleep.
I shut down about once a day, and maybe reboot about once a day.