6 Replies Latest reply on Jun 29, 2014 11:51 PM by HsinChih.Lin

    Intel IBIS model? how to translate Verlog format to Candence format ?

    HsinChih.Lin

      Have anyone use Cadence SI tool to simluate Intel chipset 's IBIS model?

      Because Intel offer Verilog format, whom know how to translate to Cadence SI formate?