2 Replies Latest reply on Jun 25, 2014 7:05 AM by JPMontero_Intel

    GPIO Driver


      Our customer was asking the PCI config space of GPIO device. They are porting RTOS onto Galileo. My understanding is, under Yocto, GPIO is a platform device, which has platform device structure rather than PCI device structure. Do we have a PCI BAR at all? They read the Galileo spec and are not sure what PCI resources to put with PCIWRITE. How do we control the Galileo GPIO devices at all?


      But problem is here also they are referring to PCI configuration as PCIWRITE(0, 0, 0, 0xD0, MyMCR). So, how to exactly resolve the address of HECREG ??

      Still I could not able to find the answer for that.


      The key point is HECREG address.