4 Replies Latest reply on Feb 24, 2014 2:58 PM by gassa

    Help need to port RTEM on Intel Galileo...


      Hey all,

      For my research purpose, I want to port the RTEMS ( Real-Time System ) on Intel Galileo.

      I have build & compile the rtems application with i386 target, pc386 bsp.

      The application is tested under QEMU.


      Then, I am trying to somehow run the application on Intel Galileo, certainly I am looking for a run to boot the RTEMS Application.

      The compiled RTEMS Application is an all-in-one ELF file. In order to let the grub on Intel Galelio, I compact a linux kernel with the RTEMS application that replace the vmlinux. The file in attachment is from the RTEMS FTP that extract the booting section including the Start.S, bootsect, bbootsect and etc. It will take the RTEMS application and replace it with original vmlinuz.


      The kernel that it generates is running correctly in QEMU. On Galileo, it seems the grub load the kernel, but there is not output message from kernel.

      The UART related address in RTEMS as follow:

      #UART BASE

      #define COM1_BASE_IO    0x3F8

      #define COM2_BASE_IO    0x2F8

      /* DLAB X */

      #define IIR  (2)    /* Interrupt Ident Register (read) */

      #define FCR  (2)    /* FIFO Control Register (write) */

      #define LCR  (3)    /* Line Control Register */

      #define MCR  (4)    /* Modem Control Register */

      #define LSR  (5)    /* Line Status Register */

      #define MSR  (6)    /* Modem Status  Register */

      #define SCR  (7)    /* Scratch register */


      From programmer ref manual in Section 4.6 mentions "There is no support supplied for legacy I/O port access at addresses 0x3F8, 0x2F8,0x3E8 or 0x2E8."

      I think this is the reason that none output message after grub load kernel.

      My Question is "How does the Linux on Intel Galileo access the UART?"

      I feel I may need to rebuild the EFI/Grub to map the register.

      Unfortunately, I have no idea where to start in order to get the UART work (e.g make the support supplied for legacy I/O port access at addresses 0x3F8, 0x2F8,0x3E8 or 0x2E8) <--- is it possible?


      Any thoughts, hints and suggestion are welcome.