QuarkX1000 does not expose LPC bus capability. Subtractive decoding is not supported, any transactions to “unclaimed” MMIO address space will be routed to an internal dummy slave rather than appearing on any of the SoC interfaces (e.g PCIe).
That's too bad, that functionality would have opened an area of usefulness to this product. Giving the capability of poking a couple of legacy I/O ranges through the PCIe root hub would have been a handy feature.
The LPC bus would have been nice from a performance to power standpoint (attaching LPC UARTS for example), but since the performance is geared toward the very low end using SPI , I guess it is an acceptable trade-off.
I still like it.
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