Hello Paul Lee,
Could you please let me know where are you getting these terms from?
I found those terms when I read Intel Scalable Memory Interconnect(SMI) Lane Failover mechanism.
Northbound is the direction from memory or a memory buffer, to the host memory controller.
Southbound is the direction from the memory controller to the memory or memory buffer.
Regarding “training”, it refers to the process used for the memory controller to negotiate various parameters with the memory (CAS latency, RAS latency etc.).
Additional information on Northbound/Southbound concepts can be found on page 10, section 1.3.1 of this document:
I got it .
And linked document is also useful.
Thank you so much.
I'm glad to know it worked.