8 Replies Latest reply on Apr 25, 2013 1:56 PM by Nil

    Problem in using TSR to implement lock

    Nil

      Hi,

       

      I am experiencing some problem in using TSR to implement a lock.

       

      I have written a test case where I access TSR for "core 0" (from core 0). At beginning I set TSR to “1” so that next read-access will read "1" and lock is granted. Then I write “0” to release it (as done in RCCE). But the problem is I can acquire a lock but then program stops there unless I write a value to TSR using “flit widget” (using sccGui).

       

      Another question, from RCCE_admin.c

      Semantics of test&set register: a read returns zero if another core has previously read it and no reset has occurred since then. Otherwise, the read returns one.

       

      Does reset means that the core that previously read it writes to TSR? 

       

      Am I missing something here?

      I have attached my code as well.

       

      Thank you

        • 1. Re: Problem in using TSR to implement lock
          Ivan Walulya

          you should never set the TSR as you have done with

          *(lock) = 0x1;

          this implicitly locks the register and subsequent reads will return false as the lock will be already set.

           

          So what i would advise you to do is not to set the lock, and let it be set by the first read which occurs in your while loop

          while (!(*(lock) & 0x01));

           

          else if u set the lock as before, you will have to release it by another core so the while loop returns.

           

          TSR summary (all done by hardware)

          1.read register value

          2.set register value.

          3. return previous register value.

          • 2. Re: Problem in using TSR to implement lock
            Nil

            Hi,

             

            i have done *(lock) = 0x1; by looking at mpb.c from RCCE that gets executed before any RCCE program runs, and it suppose to set TSR to known value (from mpb.c it seems it is "1").

             

            from mpb.c

            // Clear test&set register write. Next read-access will read "1" (lock granted).

              SetConfigReg(CRB_ADDR(x,y)+((z)?LOCK1:LOCK0), 1);

             

            how do you make sure that when you start your prog all TSR set to some known value? (i am not using RCCE)

             

             

            Thank you

            • 3. Re: Problem in using TSR to implement lock
              Ivan Walulya

              Then reset it to 0 instead of locking it.

               

              Just change *(lock) = 0x1 to *(lock) = 0x00.

               

              That way you start out with the lock being free.

              • 4. Re: Problem in using TSR to implement lock
                Nil

                Ivan Walulya wrote:

                 

                you should never set the TSR as you have done with

                *(lock) = 0x1;

                this implicitly locks the register and subsequent reads will return false as the lock will be already set.

                 

                So what i would advise you to do is not to set the lock, and let it be set by the first read which occurs in your while loop

                while (!(*(lock) & 0x01));

                 

                else if u set the lock as before, you will have to release it by another core so the while loop returns.

                 

                TSR summary (all done by hardware)

                1.read register value

                2.set register value.

                3. return previous register value.

                 

                 

                Then reset it to 0 instead of locking it.

                 

                Just change *(lock) = 0x1 to *(lock) = 0x00.

                 

                That way you start out with the lock being free.

                 

                 

                So if i start with value 0 first read inside while loop  will get 0 or 1?

                from your previous post 3. return previous register value.  so it will be (! (0 & 0x01) )  = (! 0 ) = (1) and it will never return from while loop. or am i got it wrong?

                 

                anyway i changed it to 0x00 as you said it, and i slightly modified the prog now i do lock and unlock inside for loop for 10 times and i run it for 5 times. here is the result. X represents when i have to manually write value (0) into TSR using flit widget.

                 

                that means the prog failed to acquire lock for 1st time in run 1-to-4 and it failed one more time in run 3, but it had no problem in run 5. is it not a strange behaviour? can this be explained?

                 

                Number of lock/unlock

                operation (inside for loop)

                run 1run 2run 3run 4run 5
                1xxxx
                2x
                3
                4
                5
                6
                7
                8
                9
                10
                • 5. Re: Problem in using TSR to implement lock
                  Ivan Walulya

                  Sorry my summary might have confused you more, hope the quotation below helps.

                   

                  // semantics of test&set register: a read returns zero if another core has

                    // previously read it and no reset has occurred since then. Otherwise, the read

                    // returns one. Comparing (hex) one with the contents of the register forces a

                    // read. As long as the comparison fails, we keep reading.

                  while (!((*(lockaddress)) & 0x01));

                   

                  writing a 0x00 to the location resets the register, or releases the lock.

                   

                  I can't comment on the runs above as i haven't looked at the code

                   

                  However i use the TSR without any problems and on large runs of over 20,000 interations per core.

                  • 6. Re: Problem in using TSR to implement lock
                    Nil

                    here is the code,

                     

                    I have done some more test runs and results are now even more inconsistent. some time i have do manual write once some time 10 times.

                    • 7. Re: Problem in using TSR to implement lock
                      Ivan Walulya

                      hey

                      Looking at your code, this would work fine if you execute the program on the core using

                      pssh -h pssh.host -t -1 -P -p 1 /shared/a.out


                      However if you execute the program under linux running on the core, then i suspect you will get some inconsistencies as the linux also uses the TSR. This i suspect i maybe wrong, but i would be better to create your lock based on a TSR resident on a different core than the one you execute the program. Try this and let me know if you get any more consistency.

                       

                      Or even better use pssh to execute the program on the core as this works fine even though the lock is based on a lock TSR.

                      • 8. Re: Problem in using TSR to implement lock
                        Nil

                        Thank you,

                         

                        It worked as it should be working

                         

                        when i execute it using pssh it works even on same core