1 Reply Latest reply on Apr 25, 2013 6:15 PM by Dan_O

    The 5000X Chipset and DIMM Ranks (RFI)


      Several workstations including those from Apple (2006~2008) use the 5000X MCH.


      This is a request for information (RFI) regarding the Apple implementation of the MCH in the MacPro1,1 and MacPro2,1 machines, how DIMM ranks work in general, and how DIMM ranks work in these particular systems.


      The perplexities mount when attempting to select the proper DIMMs for these systems.  My specific question is if quad rank DIMMs would work with the 5000X (Chipset containing the Memory Controller Hub "MCH") or not. By reading both user comments and Intel data sheets it remains a large and looming question. Intel's documentation specifically references only single and dual rank DIMMs. But AFAIK the way ranking works it's mostly about the total number of ranks and not so much the ranks per DIMM.


      Intel® 5000X Chipset Memory Controller Hub (MCH) Datasheet


      The MCH provides four channels and each channel can support up to 4 Dual Ranked DIMMs. That's 4x4x2 or 32 total ranks in 16 total DIMMs. Apple is only using two of the four channels (two sets of four - two 4-DIMM risers) for a total of 8 DIMMs as we all know. My uncertainty stems from the question of whether or not the channels have dual boundaries or not and the documentation doesn't specify.


      In other words, if I'm only using 8 total DIMMs can I still use all 32 ranks, or would I still be limited to 8 ranks per channel? In more modern chipsets I believe it is the former and I could indeed use up all the ranks even on a single chip if I wanted - and if such memory existed. But on the 5000X I'm not sure.