Recently, I am working on a research project, which base on ECC memory. My experiment required to dynamically enable and disable ECC checking of main memory. An previous research paper has already shown it is possible(on a platform with Intel chipset E7500), but all my attempts were failed on my platform.
Here is my platform information:
Chipset : Intel 5500 I/O Hub (rev 13)
Processor : Xeon E5520
Memory : Kingston 4G DDR3 1600 ECC(KVR16E11/4)
I download datasheet of 5500 chipset, but haven't find out how to enable ECC checking. Then I download Xeon 5000 series datasheet. On Volume 2 , chapter named "2.11 Integrated Memory Controller Control Registers" I found register "MC_CONTROL". I try to set this register to enable / disable ECC checking (code are implement on linux 2.6.37), but whether read or write, value read from this register is always zero, register "MC_STATUS" ,which show status of ECC checking, is always zero too. It seemed that these registers doesn't exist. I notice that chapter 2.11 begin with "The registers in section 2.11 apply only to processors supporting registered DIMMs.". So I search on intel.com to specify whether my processor support these registers, but failed to find further information. I saw some previous discussion of Xeon 5500 series processors(Xeon 5500 series and ECC memory), but I failed to set these registers, so ask for help.
Does Xeon E5520 support registered DIMM? If it does, why I can't set register "MC_CONTROL"?(or I found the wrong register to enable ECC checking? or I lack of some previous initialize steps?)
If my platform can't support dynamically enable / disable ECC checking, I have to buy a new platform to support it. How to find a configuration now available on market meet this requirement.
Thanks a lot.