4 Replies Latest reply on Nov 14, 2012 8:04 AM by Intel_Karla

    Cache replacement policy for Nehalem/SNB/IB?


      I am working on a simple cache simulator for recent Intel processors.  It's used to provide profiling info for our cache optimization.  Therefore, I don't need it to be very very accurate, but it can't be too different from the facts either. 


      I didn't find much information about cache line replacement policy.  Does anyone know where I can look up these info?  I am mostly interested in L2 and L3 cache replacement policies.  Someone online said it's PLRU.  Can anyone confirm that?  If yes, is it a tree-PLRU or bit-PLRU?