I have a quick question regarding the clocking of the FPGA. I was wondering whether it is derived from the same clock as the SCC? The reason I'm asking is that I would like to calculate a core's offset to the global clock in order to have a common time basis amongst all cores. Now when use the FPGA clock of 125 MHz and the Cores' clock of 533 MHz I arrive at a ratio of 64/15. Using this ration I should be able to calculate a core's offset using:
offset = (FPGA_clock/15)*64+(local_clock-RTT/2)
Unfortunately it seems that using this relationship between the clocks does not provide me with a constant offset but instead the offset decreases when the same procedure is repeated over time.
Is there a drift between the FPGA's clock and the Cores' clocks? Any ideas would be great.