You may also want to check the LED lights RockyLake board. The OV or OC are probably lighted Red.
Also posting the results from:
sccBmc -c status
might prove insightful even with the chip powered off.
This is not a common error. I have only seen this around three times.
Do you know if any user has loaded a different bitstream? I have had this type of strangeness when the bitstream does not match the sccKit.
I have also had a bad chip that caused this error. Has the chip been removed lately? A new Rock Creek chip installed?
Once the power supply in the SCC had failed.
Thanks for the quick response!
The OV light is red.
Here is the printout from the BMC status:
INFO: Welcome to sccBmc 1.4.2 (build date Dec 20 2011 - 14:33:38)...
INFO: Result of BMC command "status":
I²C access is switched to BMC
Power Status = 0x8F3D, OFF
5V0PWR: 5.025 V (Primary)
1V8SB: 1.804 V (Secondary)
3V3PWR: 3.260 V -"-
3V3IN: 0.000 V
5V0IN: 0.548 V
12V0R1: 0.013 V
12V0R2: 0.013 V
1V0: 0.000 V 0.030 A
1V1VCCA: 0.000 V 0.020 A
1V1VCCT: 0.000 V 0.020 A
1V5: 0.000 V 0.101 A
1V65: 0.002 V
1V65ADJ: 0.000 V
1V8PHY: 0.000 V
2V5: 0.136 V
3V3: 1.000 V 0.020 A
3V3SCC: 0.196 V 0.297 A
OPVR VCC0: 0.0019 V
OPVR VCC1: 0.0003 V
OPVR VCC2: 0.0054 V
OPVR VCC3: 0.0003 V
OPVR VCC4: 0.0009 V
OPVR VCC5: 0.0023 V
OPVR VCC7: 0.0007 V
Board: 25 °C
FPGA: 23 °C
FPGA: 155 RPM (Needs real conversion to RPM!)
SCC: 101 RPM
1) The default bitstream is loaded I believe it is named "rl_20110624_ab.bit"
2) The chip has never been removed since the scc system was shipped to us. It was working great even earlier today.
3) I have not fully checked the power supply but besides for this issue it appears to be working... Even though I have an account on bugzilla I can't see that bug for some reason...
You are not authorized to access bug #81.
Thanks again for your quick response!
This is strange it just started to happen.
It looks like the sccKit was upgraded to 1.4.2 recently ?
This makes me wonder about the bitstream.
It is difficult to tell if the bitstream is correct on the SCC since it has the same name and size as sccKit 220.127.116.11.
You may want to run the install script again. Making sure that the
/opt/sccKit/18.104.22.168/firmware/RockyLake/update/update.txt file has been incremented.
Also make sure you are using sccKit 22.214.171.124.
Lastly, besides the sccKit upgrade, has anything out of the ordinary happened? A power outage in the building? CPU replacement? The system moved to a different location?
Well if it was working fine after the 126.96.36.199 upgrade, I doubt reinstalling the bitstream will help. But worth a try:
The recommendation on another bug was to try a cold boot on both the SCC and MCPC.
If those options do not fix the problem. Please fill out a bug on:
Also in the bug reference this posting.
I will make sure IBW gets copied on the bug.
IBW may have another idea.
I have a feeling it is either a bad CPU or SCC powersupply. Once the bug is filed, we can make a plan of action.
this error message "Error: 3V3 SCC did not reach level. Shutting down!\r\n" is generated, when the 3V3 SCC rail does not reach 95% within 3.5 sec. There is a very high probability, that your SCC chip is drawing to much power. And the hard power off switching triggers the OV detection.
Besides, what are your power settings for the SCC? Please, use the SET command without any arguments to display the voltage trimming settings and send me those results.
Here is the output of the SET command:
Current settings are:
Default FPGA bitstream: /mnt/flash4/rl_20110624_ab.bit
Associated MAC addresses:
- Port A 0x000000000001
- Port B 0x000000000002
- Port C 0x000000000003
- Port D 0x000000000004
Target trimming voltages:
0 1.100 V
1 1.100 V
2 1.100 V
3 1.100 V
4 1.100 V
5 1.100 V
6 1.100 V
7 1.100 V
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Ok, trimming voltages are as expected within normal range.
Then I fear, your SCC chip is broken. To test this, let's make sure the board itself isn't:
- The pins of the SCC socket are extrem fragile.
- Keep the pins clear of any thermal grease.
- Tighten or loose the heatsink screws by turning them only a few rounds every time.
- Remove the power cable and wait until all LEDs on the board are off.
- Disconnect the fan of the heatsink from the board.
- Remove the heat sink.
- Remove the SCC chip from the socket.
- Reconnect the power cable.
- Telnet into the BMC and execute the command "POWER TEST". This is intended to be used ONLY with an empty SCC socket!
- Use the "STATUS" command to display all voltages.
Except for the tertiary voltages, everything should be within a reasonable range. If the 3V3 SCC is now stable at 3.3V, the SCC chips internal power regulators have been blown. If the 3V3 SCC rail is not at 3.3V +/- 5%, the board is broken.
- Use "POWER OFF" to shutdown.
- Before mouting the heatsink, make sure, there is enough thermal grease (a small drop will do).
Here are the results from the power test:
Done! Power is on in testmode.
I�C access is switched to BMC
Power Status = 0xCF3F, TEST
5V0PWR: 5.017 V (Primary)
1V8SB: 1.804 V (Secondary)
3V3PWR: 3.256 V -"-
3V3IN: 3.380 V
5V0IN: 5.047 V
12V0R1: 12.078 V
12V0R2: 12.065 V
1V0: 1.024 V 0.450 A
1V1VCCA: 1.114 V 0.020 A
1V1VCCT: 1.114 V 0.020 A
1V5: 1.528 V 0.457 A
1V65: 1.648 V
1V65ADJ: 1.652 V
1V8PHY: 1.800 V
2V5: 2.480 V
3V3: 3.332 V 0.930 A
3V3SCC: 3.300 V 0.297 A
OPVR VCC0: 0.0000 V
OPVR VCC1: 0.0000 V
OPVR VCC2: 0.0000 V
OPVR VCC3: 0.0000 V
OPVR VCC4: 0.0000 V
OPVR VCC5: 0.0000 V
OPVR VCC7: 0.0000 V
Board: 23 �C
FPGA: 21 �C
FPGA: 85 RPM (Needs real conversion to RPM!)
SCC: 171 RPM
FPGA status: 0xEF
Lane Good LED is off
CPLD status: 0x05
PLL is not locked.
PLL lock lost is cleared.
The 3V3SCC looks good so your saying that means the chips power regulator is broken.
Looks, like your SCC chip is for the bin. That does happen sometimes. You should clarify with mwaughex, how to get a replacement.
Once you have replaced the chip, do not power up the board the usual way with "POWER ON" or the power button on the front panel. That will blow your new chip. Just turn on the ATX-power supply, telnet to the BMC and use the command "POWER AUTOTRIM" to start the calibration process. When the BMC reports success at the end of the calibration, you can use the system as before.