Since at least the 4 series of chipsets, Intel has provided a way to gang the southbridge x1 PCI-E ports together to create x2 and x4 PCI-E links. The procedure for doing this was publicly documented for the 4 and 5 series chipsets. All that had to be done was change 2 bits in the PCI-E configuration registers, and you had an x2 or x4 link. This was very handy for achieving acceptable performance on laptop external graphics cards.
Unfortunatley, Intel changed this procedure for the 6 series of chipsets, and seem to have neglected providing information publicly on how to set x2 and x4. All that is stated on how to do it now is:
"PCI Express Root Ports 1–4 or Ports 5–8 can independently be configured as four x1s,
two x2s, one x2 and two x1s, or one x4 port widths. The port configuration is set by
soft straps in the Flash Descriptor."
I looked up the soft straps section, and it had no data whatsoever on how to set x2 and x4. If any of you knows anything about soft straps or the flash descriptor, I would greatly appreciate it if you filled me in on what exactly these things are and what I need to change to get x2 and x4 links. Even if it isn't much information, I would still appreciate it.
It may be possible that I missed something in the chipset documentation. Below is the documentation that I went through:
Again, any help at all would be great.