I have a question about the older Southbridge chipsets. You see I own several motherboards that support older CPU's and wanted to find out how the "hub" that the Southbridge controls really works. My interest is focussed on the how data travels between the Southbridge and the Northbridge chipsets. My understanding is that when data is being retrieved from IDE device i.e IDE Hard Drive like for example when Windows is being loaded on start up of the computer. While that is happening I can see data being transfered from the IDE device via the Southbridge chip and then to the Northbridge chip and from there to the CPU and to Memory. Of course I understand there is data sent to the AGP (video card) via theNorthbridge and then CPU and to Memory and then the AGP video card is notified of pending data which updates the monitor/display. Now my question is really when data is being retrieved from the IDE device as described just above, does the data get sent to other devices like to the USB ports or Ps/2 devices or to the PCI bus ? I can understand that during the early stages of the Windows bootup sequence data is sent to all devices on the motherboard to check for the presence of these devices so that Windows can load appropriate drivers and perhaps even initialize these devices on bootup. But lets say following bootup and after the detection of these devices takes place does data get randomly sent to all other devices just like in the case of how a network hub works. The old network hubs would forward packets to all ports located on the device like a repeater. Does the Southbridge chipset do the same in that data is repeated to all devices on the Southbridge hub ? I don't believe that it does repeat data to all devices located on the Southbridge hub because it would cause collisions and perhaps data loss and lowering system performance. But I would like to know the answer if my theory is correct or not. I do understand that when a device has something to say like data to send it notifies the Interrupt controller and then waits for its turn to send the data to the appropriate chipset....I may be not quite accurate of how data travels on the motherboard so please accpet my apologies for being inaccurate or mistaken. But I hiope my question is clear and if not I would be happy to explain myself better.
Thanks in advance