6 Replies Latest reply on Sep 30, 2011 7:44 AM by philippg

    Impact of frequency on memory performance




      I am running some experiments to check the impact of frequency on performances on SCC.


      I am using a well known compute bound algorithm : dotproduct.


      I am measuring time with rtdsc, I was expecting that reducing the core's frequency will end up in reducing the amount of cycles needed to perform the computation (as memory will be relatively faster). But it seems that it has no impact at all: cycles needed to perform the operation stays constant regardless of the frequency divisor I use.


      That bring several questions to me :
      - does RCCE_set_frequency_divider() changes the frequency of the bus ?
      - just to be sure: the caches are on chip, so their frequency is the same as the core, right ? (So for samll data that fits in cache I understand that the cycles remain the same...)
      - How can we download MKL 8.1 to install it on SCC so I will be sure that it is not because of a problem own my own code.