1 Reply Latest reply on Sep 10, 2011 5:55 AM by aprell

    L1 has write-combining buffer; write incomplete line? expect trouble!

    mziwisky

      The subject of this post is on slide 9 in http://communities.intel.com/docs/DOC-5175

      It is followed by, "Solution: Don't. Always push whole cache lines."  I didn't get to see this presentation, and I do not understand what these two lines mean.  Can someone please explain them?

       

      Thanks,

      Mike