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Some probable mistakes in Intel data sheets?

idata
Employee
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My question is about Intel 64 and IA-32 software developer's manual 3A. It says:

6.14.3 IRET in IA-32e Mode

The size of the pop is determined by the address size of the instruction. The SS/ESP/RSP size adjustment is determined by

 

the stack size.

IRET pops SS:RSP unconditionally off the interrupt stack frame only when it is

 

executed in 64-bit mode. In compatibility mode, IRET pops SS:RSP off the stack only

 

if there is a CPL change.

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The size of pop is determined by the address size or by the operand size? SS/ESP/RSP or SP/ESP/RSP?

In compatibility mode, IRET pops SS:RSP off the stack or SS:ESP(SS:SP)?

Is there any forum to discuss Intel data sheets and documents?

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