0 Replies Latest reply on Nov 12, 2010 12:00 PM by freedio

    Intel 64 and IA-32 Manuals: Ambiguous Specifications




      I am currently developing a FORTH assembler supporting the full Intel 64 and IA-32 instruction set.  I use the appropriate manuals for this, which are basically

      Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 2A: Instruction Set Reference, A-M and


      Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 2B: Instruction Set Reference, N-Z.


      Both manuals have subtle mistakes or ambiguities which require some working with them to be encountered—until now I could find common sense solutions to all of them; now I have a couple of instructions in which the “Instruction Operand Encoding” shows ModRM:reg for both operands, which cannot be; unfortunately there is no common-sense solution for the ambiguity, because both solutions (Operand 1 = ModRM:reg and Operand 2 = ModRM:r/m, as well as Operand 1 = ModRM:r/m and Operand 2 = ModRM/reg) are both fairly common, albeit there is a slight bias towards to first solution (i.e. register is more often the destination operand than the source).  But I can't be really sure.


      The complete list of culprits is: MOVDQ2Q (Vol. 2A, page 3-701), MOVHLPS (Vol. 2A, page 3-702), MOVLHPS (Vol. 2A, page 3-711), MOVMSKPD (Vol. 2A, page 3-719), MOVMSKPS (Vol. 2A, page 3-721), MOVD2DQ (Vol 2A, page 3-743), and PMOVMSKB (Vol. 2B, page 4-186).


      Does anyone in the community know the correct “Instruction Operand Encoding” for these instructions?