1 Reply Latest reply on Oct 12, 2018 11:57 AM by Intel Corporation

    CPLD Max II, programming.

    Igorkurchatov

      Hello, I write in hopes that I can solve a problem encountered in CPLD integrated circuits. I use a board purchased from the internet, equipped with CPLD Max II - EPM1270T144C5, programmed through the Quartus II Lite software. This CPLD has been configured in a simple two-port Nand latch SR, where pull-up resistors have been enabled at the inputs. By programming the board successfully and verifying that the logic was correct, I noticed an anomaly. Precisely, if I connect the board to a power supply (AC / DC converter), where there is no network filter, I just touch one of the pins of the CPLD to drive the SR latch crazy, sometimes it is enough to bring a finger to a distance of 2/3 mm from the package. The problem is substantially reduced by connecting a battery, reducing to 95% if the power is supplied by a USB port of a PC, with a mains filter. I state that during the programming phase I have set all the unused pins in all the allowed possibilities, GND, tri-state pull-up, etc. In the hope you can give me an opinion. Thank you.

        • 1. Re: CPLD Max II, programming.
          Intel Corporation
          This message was posted on behalf of Intel Corporation

          Hello Igorkurchatov
           
          Thank you for posting in the Intel® community.
           
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          Leonardo C.
          Intel Customer Support Technician
          Under Contract to Intel Corporation