On the Internet I've found two different oppinions about erase block size of Intel's X25-M (and X25-V) SSDs: 128kB and 512kB
Intel gives an example in which a host system generates a 4KB write request that, thanks to a drive's 128KB erase block size, actually incurs a 128KB NAND write. Dividing the NAND write size by the request size yields the amplification factor, which is 32 in this case. Intel says the X25-M's write-amplification factor is extremely low at 1.1, while "traditional" SSDs have much higher amplification factor of 20.
Group a bunch of cells together and you've got a page. A page is the smallest structure you can program (write to) in a NAND flash device. In the case of most MLC NAND flash each page is 4KB. A block consists of a number of pages, in the Intel MLC SSD a block is 128 pages (128 pages x 4KB per page = 512KB per block = 0.5MB). A block is the smallest structure you can erase. So when you write to a SSD you can write 4KB at a time, but when you erase from a SSD you have to erase 512KB at a time.
For the X25-M this block is as large as 128 pages or 512 kilobytes or half a megabyte. As a result, if there is a request to erase (or rewrite) one page, the drive has to erase 128 pages.
and then again, even on this forum I've found both 128kB and 512kB info:
So, can someone officially say: is the size of erase block on X25-M(V) 128kB or 512kB ?