I have been looking at the performance of the SPI to FPGA transactions on an oscilloscope and noticing that while I can transfer bytes at 25 MHz, the spidev driver puts very large gaps between bytes (2us and 6us repetitively compared to the 320ns required to transfer a single byte) when provided with an spi_ioc_message structure that transfers a large number of bytes in a single call. Given that the SPI devices on the Atom processor appear to support DMA, I am puzzled by this large overhead. The overhead is proving to be a limitation in our application, as transfers of, say 256 bytes, are taking about 1ms when they should take less than 100us.
I would like to investigate the reasons for this behaviour in the SPI controller kernel driver code in Yocto and possibly experiment with improving the situation. However, digging through the Yocto tree is a bit of a maze. I have found where the SPI devices are registered for the FPGA and IMU (meta-intel-aero-base/recipes-modules/intel-aero/files/*), but the source for the SPI master is not there. Does anyone know where the source code is for the SPI controller/master for the Intel Aero in the Yocto tree? (i.e. the code that actually interacts with the Serial IO (SIO) or Platform Controller Unit (PCU) of the Atom processor) Are there tried-and-true techniques for tracking these things down? (for instance, the SPI master appears to be the pci0000:00/8086228E:00/spi_master device under /sys/devices, but how might that be used to track down the source code in Yocto?).
Thank you for your interest in the Intel Aero drone.
Your request has been received and is currently being investigated.
We will get back to you as soon as possible.