Thank you for sharing this information, I reviewed your inquiry but I wont be able to provide an answer for such an specific scenario, I'll make some research and be back with you as soon as possible, if there is further information that you may consider relevant for this case plesase feel free to reply to this message.
Intel Customer Support
Thank you for joining the community
To understand better the situation could you please let us know the following?
What kind of application or service is being affected by this data loss?
The motherboard A they are two desktop boards could you let us Know the processors that you have installed on then?
Thank you for your reply.
On P9X79 WS, it runs Intel i7 4700. (quad core).
on X270, it runs Intel i7 6700.
We are running a data acquisition application. the data are streamed in through PCIe FPGA card, transferred to host memory over PCIe. for the nature of the application, we do not allow the data to be dropped, because it loses information.
BTW, in the document,BDE91, it says "writing the IIO LLC Ways MSR results in an incorrect value".
I would like to check does increasing the IIO LLC WAYS increase the PCIe/DMA performance of the chipset?
Please let me know if you have any suggestions.
Thank you for let us know more information about the case. Looking into the situation I will like to share the following link to better assist you with the questions related to the embedded Intel® Xeon® D processors please refer to the following links
You can also look for assistance with an authorized distributor of your own choosing for them to request a field application engineer for more information about the processor
I would like to follow up on this case:
Xeon D 1541 mother board.
We have a FPGA card which performs DMA to XeonD 1541's host memory. the FPGA FIFO size is 320KBytes. the PCIe transfer data rate is 1.6GB/s.
When we perform the DMA data transfer, it is observed sometimes the data are all good, there is no data loss.
However very often, the FPGA card reports a FIFO overflow. that means the chipset is holding the PCIe bus for more than 320K/1.6GB/s = 200us.
so I would like to check in Xeon D1541 cpu/chipset, is there any register settings that set the PCIe bus arbitration time and which guarantees the response to my FPGA card's PCIe requests timely?
any suggestions will be appreciated.
Thank you for your response let me share with you that on this community we are able to assist boxed processors for detail information on the Intel® Xeon D 1541 we encourage you to refer to the Intel® Embedded Community to assist you on your request
Here is the link to the Intel® Embedded Community