0 Replies Latest reply on Mar 27, 2010 10:27 AM by amdn

    Which processors support MONITOR/MWAIT at CPL > 0

    amdn

      Which processors support MONITOR/MWAIT at CPL > 0?  Is that information documented anywhere? More specifically, on Linux is there something special that needs to be done to enable MONITOR/MWAIT at user privilege level?  An application on Linux reports CPUID(1).ecx[3] == 1 on Nehalem (Xeon X5570 Dell r610) yet MONITOR/MWAIT result in #UD exception.  Documentation on this is ambiguous.

       

      http://www.intel.com/Assets/PDF/manual/253668.pdf

       

      Intel® 64 and IA-32 Architectures
      Software Developer’s Manual
      Volume 3A: System Programming Guide, Part 1

      Order Number:  253668-033US
      December 2009

       

      14.4 MWAIT EXTENSIONS FOR ADVANCED POWER
      MANAGEMENT

       

      Page 14-10 Vol. 3

       

      Says

      At CPL=0, system software can specify desired C-state and sub C-state by using the
      MWAIT hints register (EAX). Processors will not go to C-state and sub C-state deeper
      than what is specified by the hint register. If CPL>0 and if MONITOR/MWAIT is
      supported at CPL>0, the processor will only enter C1-state (regardless of the
      C-state request in the hints register).
      Executing MWAIT generates an exception on processors operating at a privilege level
      where MONITOR/MWAIT are not supported.

       

      Thanks.