2 Replies Latest reply on Jul 23, 2017 9:26 PM by mohamedshaharris_intel

    UART baud rate clarification

    LonGlazner

      Hi,

       

      I've seen a number of discussions and documents related to the D2000 UART baud rate settings.  This includes these documents that describe the settings/equations in detail...

       

      Program UART Interfaces on the Intel® Quark™ Microcontroller D2000 | Intel® Software

       

      https://software.intel.com/sites/default/files/managed/9b/02/D2000%20-%20Change%20the%20Baud-rate%20of%20UART-STDOUT%20v…

       

      All show the equations for the baud rate calculation based on the system clock, divisor and fractional divisor.

       

      However, only the datasheet (page 179) states...

       

      Baud Rate configurability between 300 baud and 2M baud.  Maximum baud rate is limited by system clock frequency divided by 16.  Supported baud rates: 300, 1200, 2400, 4800, 9600, 14400, 19200, 38400, 57600, 76800, 115200; multiples of 38.4kbps and multiples of 115.2kbps up to 2M baud

       

      https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/quark-d2000-datasheet.pdf

       

      I've been trying to operate the D2000 at 500Kbps (divisor 4, fdivisor 0).  It hasn't been working out very well, so I'm wondering if the datasheet statement of "multiples of 115.2kbps up to 2M baud" might be the culprit.  Can anyone shed light on whether or not the UART hardware requires operation in the multiples stated in the datasheet?  I assumed it was based entirely on the dividers and system clock, in which case I don't need to use a standard baud rate, and can use one with less error at a higher speed.

       

      I've been interfacing to a modem using software at 500Kbs without any problems.  But the D2000 shows bit errors with in each byte received when I use it in place of the test software at the higher baud rate.

       

      Thanks.