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I am writing a book about Wolfenstein 3D and the Intel 386. Looking into the http://zsmith.co/intel.html cost of each 386 instructions, i noticed that none of them (including simple ADD or INC) can execute in one cycle. All of them execute in at least two cycles. I am trying to understand why.
According to http://css.csail.mit.edu/6.858/2015/readings/i386.pdfhttp:// hardware reference manual of the 386, it is a pipelined three stages CPU so it should be able to execute on instruction per cycle (once the pipeline is full). Googling further, I found that the Decode Unit can only process one opcode/operand per cycle (http://www.rcollins.org/secrets/PrefetchQueue.html source) so that would explain why the pipeline gets stalled.
But if my theory is right, that call for the question: With all the design going into the 386 and the three stage pipeline, why not design the Decode Unit to be able to decode a full instruction in one cycle? That would have doubled the performance of the CPU.
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fabien78, Thank you very much for joining the Intel® Processors communities.
In order to provide the most accurate response to your inquiry, we will do further research on this subject. As soon as I get any updates I will post all the information on this thread.
Any further questions, please let me know.
Regards,
Alberto
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fabien78, I just wanted to let you know that I just received an update about the research we were doing on this matter, and the thing is that the Intel® 386 processor at this moment is EOIS (End of Interactive Support), so there are no documents or archives available for this product anymore, let me apologize for that.
However, I encourage all the peers in our communities viewing this thread that if they have any information or suggestions related to this subject to please post their comments on this thread.
Additionally in order to get further assistance on this product, as an option you can always visit the Intel® embedded design center, they might be able to provide further details in there:
http://www.intel.com/content/www/us/en/embedded/embedded-design-center.html http://www.intel.com/content/www/us/en/embedded/embedded-design-center.html
Any questions, please let me know.
Regards,
Alberto
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