JaemoonSim, thank you for your patience.
The uncore management performance counters for Skylake are exposed to the operating system through the MSR interface.
More details can be found on the Intel® Software Developer System Programming Manual Vol. 3 which you can find at the following link; https://software.intel.com/sites/default/files/managed/a4/60/325384-sdm-vol-3abcd.pdf. Check Chapter 8.7.7 Performance Monitoring Counters.
If you have more questions, please let me know.
Thank you for response, Amy.
However, I've been looking for something more 'functional' configurations of uncore registers.
In Xeon series, there are pci config registers to config functions of uncore registers.
(e.g., In document Intel® Xeon® Processor E7 v2 2800/4800/8800 Product Family, Chapter 13, Processor Uncore Configuration Registers)
Isn't there anything like that in core series cpus?
Thanks again for your response and hope you write back.
Sorry to bother, but is there anything new for me?
Jaemoon, my apologies for the delay, and thank you for your patience.
I would like to let you know that after reviewing your inquiry we have confirm that there is no other information apart from what is already mentioned in our datasheet.