Thanks for answering.
Unfortunately I'm still getting those errors.
Is that the only step to be carried out?
Does it need to be in a specific sequence with the board power-up?
This is the sequence you need to do :
- Power off the board - disconnect the USB
- Ground the J14 pin 28
- Reconnect the USB
- With the J14 pin 28 still grounded try to connect OpenOCD
Have you ever been able to connect to the JTAG ? or this happened after you flashed a ROM/Application to the board ?
I can confirm that the sequence I tried is what you're suggesting.
About your question: I had been using this board for a couple of month at least when the JTAG connection stopped working, during which I flashed countless times to it.
The issue showed up the first time while flashing a program to the board.
Tried on both platforms and the board is displayed correctly in both cases.
Can you post the full error message you get when you try to connect from the command line.
Here follows the command and its result:
/opt/intel/issm_2016.1.057/tools/debugger/openocd> bin/openocd -f scripts/board/quark_se_onboard.cfg
Open On-Chip Debugger 0.8.0-dev-gba72ade (2016-07-19-11:14)
Licensed under GNU GPL v2
For bug reports, read
Info : only one transport option; autoselect 'jtag'
adapter speed: 1000 kHz
trst_only separate trst_push_pull
Info : clock speed 1000 kHz
Error: JTAG scan chain interrogation failed: all zeroes
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: quark_se.cltap: IR capture error; saw 0x0 not 0x1
Warn : Bypassing JTAG setup events due to errors
Thanks for your help
Was the default ROM flashed without any changes ?
Also, if you have an application that puts the Soc into deep sleep you may lose the JTAG access. As long as you have the default ROM flashed to the SoC then grounding J14 Pin 28 should 'unbrick' the board and get your JTAG access back.
At the board initial setup, the ROM was flashed as per default, no customization.
I didn't run any application recently which switches the SoC into deep-sleep mode.
Tried the suggested maneuver (J14 Pin 28 to ground) but with no success.
One thing: the board I'm using is an old revision.
It should be something like "Atlas Hills - rev 1.0"
It should still work.
For that board just verify you are setting P3 pin 28 to ground - this is the equivalent of J14 pin 28 on the new boards. On both boards this is AP_GPIO15_I2S_RXD.
I had already compared the pin-out in my board and in an up-to-date one and verified that the functionalities for that pin match.
I was rather asking about other possible differences which may require a different action but you confirmed that it's not the case.
I guess that with no access through the JTAG there is no chance to erase the flash, correct?
Correct - If you cannot access the JTAG then you cannot erase the current flash - or flash a new ROM