Hi Angie ,
This is more of an academic question not related to any specific chipset model . Earlier with hub architecture North and South bridges used pci host bus to communicate with the cpu . Thus even the nic, hba etc used pci bus.
Now with the removal of North bridge and introduction of platform control hub which includes Integrated nic , hbas , what is the host bus architecture . Do these integrated nic still use PCI to communicate with the cpu ? Unlikely as this will give low bandwidth ? Then why do we still see these integrated nics , hbas as pci in Linux using lspci ?
In case you want a model , you could take any PCH chipset . I guess 9 series s ? *or whichever as a reference .
And processor could be 6th generation i7.
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