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Enabling Per Core P-States (PCPS) on Haswell-EP

idata
Employee
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Hopefully someone can find the answers I seem to me missing.

I'm wanting to test a set of applications' performance on Haswell-EP (Xeon E5-1600/2600 v3 series) with a governor that makes use of the "Per Core P-States" feature. I'm having difficultly finding a lot of documentation on the feature to be able to first ensure the test bench I put together will allow me to use the feature as well as how to enable/disable the feature for testing purposes. There are a couple of research publications that mention or use the feature, but they do not give a lot of information on how it was enabled or how to enable/disable it.

Any help would be appreciated!

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idata
Employee
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While I appreciate the help, both documents appear to be out of date or at least don't discuss the Per Core P-States feature of Haswell-EP. While both documents do explain what a P-State is and how they function, they both also state that P-States are at the package level, not per core as is the case (at least according to the marketing material) for Haswell-EP (Xeon E5 v3 Family). I've read through multiple materials about P-State and C-States from the general view, but I need to know about how to check PCPS is available and functioning on a Haswell-EP system.

From "Power Management States: P-States, C-States, and Package C-States":

Briefly, the coprocessor has package-based P-states, core-based C-states (which are sometimes referred to as CC-states) and package-based C-states (PC-states). It also has the capability to operate in Turbo mode3. There are no per-core based P-states.

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idata
Employee
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I have forwarded this information to the appropriate team. I will update this thread as soon as news become available.

 

 

Allan.
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Ronny_G_Intel
Moderator
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Hi Bryan_Elliott,

It seems that finding this information is difficult. Would you mind being more specific and provide as many details as possible, for instance what specific application and processor are you using? Is this a Workstation application or a Server application?

Regards,

Ronny G

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idata
Employee
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We need some details about this inquiry, we are looking for the processor model and the software or application you are currently using on your computer.

 

 

Allan.
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idata
Employee
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Sorry for the delay in responding. We are currently looking to assemble a machine for use with a research experiment. Since the research involves per-core frequency scaling, we were looking at the Haswell/Broadwell-EP line due to the marketed feature of per-core P-States which would allow us to tune each core to a specific frequency and thus voltage value. We need to know though the following

A) Is the PCPS enabled at all times, so using the linux cpufreq governors we can change each individual core's frequency/voltage

B) If it is not enabled at all times, how do we enable it on a commercial system

C) Is there a way to disable it to have as a baseline comparison.

We're working with a custom Linux 4.7.4 kernel and right now looking at the Xeon E5 2687W v4 for the machine.

Hopefully this is helpful to find the information I'm looking for.

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idata
Employee
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Thank you for the information. I have forwarded this details to the appropriate team. This will be updated soon.

 

 

Allan.
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idata
Employee
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Thank you for your patience.

 

 

This is the response I have received so far.

 

 

If you are using the Intel PState driver, the default mode can be disabled at boot-time with intel_pstate=disable. This can provide the before and after state you seem to pursuit.

 

 

The Intel pstate driver offers two governors: powersave and performance. Grub will need to be modified to make this persistent. You would need to reference this information to the Linux distros documentation web pages or support community on how to best configure, various from distro to distro. Same for the tools sets like cpupower and other frequency management tools.

 

 

ACPI specifications also provide general info on P-states and details for that driver.

 

 

Hope this helps

 

 

Allan.
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