4 Replies Latest reply on Aug 3, 2016 5:40 PM by Hellen_Intel

    Adaptive cache voltage - nature of bug discovered


      First, it's really odd that I can't find a single thread regarding adaptive cache voltage anywhere on the Intel forums, considering that it doesn't work.  If there's a better place to post about this, or someone at Intel I could email about it, please let me know.


      Okay.  For a long time now, it's been considered common knowledge that "Adaptive cache voltage" simply doesn't work with Intel chips.  And, in fact, it doesn't, at least not configured the way it's supposed to be (similarly to adaptive core voltage, which works fine), at least not with Asus boards, and I haven't heard about it working on anyone else's motherboards either. 


      As I own an Asus Rampage V Extreme, and those are the forums I frequent, my understanding is that Intel and Asus have batted responsibility back and forth.  Intel says Asus needs to update their microcode to the newest version, and Asus says it still doesn't work.  Well, the BIOS 3301 for the RVE that Asus released a couple of days ago finally *did* update the microcode to the current Intel version 38 (from previous version 2d), so I figured I'd give it a whirl and do some tests.  And what I've found has been fascinating.


      In the ASUS Bios, you configure Adaptive Cache Voltage with two settings:


      1)  Offset Cache Voltage
      2)  Additional Turbo Cache Voltage


      The "Offset" portion of Adaptive Mode works pretty much the same way that using Offset Mode does, and it seems to work correctly.  It increases the voltage evenly across the entire VID table.  Now, this Offset Mode, not to be confused with the Offset setting under Adaptive Mode, has always worked fine and has been the recommended way to set cache voltage (the third option being Static/Manual).  It has the disadvantage, though, that your offset value affects your idle voltage too, not just your voltage under load, so that your voltage at idle is considerably higher than it needs to be.  The advantage of Adaptive Mode is supposed to be solving that specific issue.  But, it hasn't worked right.


      So, anyway, back to the settings.  Offset works fine.  The problem is the second field, "Additional Turbo Voltage.".


      Now, I think the label on that setting, "Additional Turbo voltage", is horribly misleading.  Pet peeve of mine actually, but I won't get into it.  What you need to know is, if you want to set the maximum voltage your cache voltage should rise to when under heavy load and maximum clocks, you enter that into the "Additional Turbo Cache Voltage" setting, after subtracting whatever you entered in the Offset field.  To put it another way, the *sum* of the two settings, "Offset" and "Adaptive Turbo Cache Voltage", is what your maximum voltage should be under load.


      So if you don't want to apply an offset (and you shouldn't need to to get Adaptive Cache working), you can leave it on "Auto", or +.001v, and then you put what you actually want your max voltage to be in the "Additional Turbo Cache Voltage" field.  For example, with my adaptive *core* voltage, I set Offset to +.001v and Additional Turbo to 1.269v, and I get a maximum voltage of 1.27v.  This is how adaptive cache is supposed to work too, but if you try it with those same numbers, you will fail to boot.  And now I know why.


      After a huge number of tests, I discovered this:  Additional Turbo Voltage *does* affect the maximum applied voltage, but the value you enter is getting altered somewhere along the line. Specifically, the "Additional Turbo Cache Voltage" value is, somewhere along the way, being divided by 4.


      An example:


      When I tried it using +0.17v offset, and 1.0v Additional Turbo, my cache idles at 0.990v and at maximum load I'm at 1.144v.

      If the only thing I change is increase Additional Turbo to 1.2v, my idle remains at 0.990v and at maximum load I'm at 1.194v.

      Increasing Additional Turbo Voltage by 0.2v only increases the actual maximum voltage by 0.05v.  This "divide by 4" issue seems to be consistent across all tests.


      So, obviously, the sum of the offset and additional turbo fields don't give you your actual maximum voltage as they're supposed to.  And if you actually want to apply a higher maximum voltage, you have to enter *crazy* high values into the Additional Turbo Voltage field.  For example, I calculated that if I wanted to have an offset of 0 (necessary if you want to have the lowest idle voltage possible, which is the whole point), and reach a real maximum voltage of 1.212v (for my cache overclock of 4.2Ghz), I would have to set the "Additional Turbo Cache Voltage" field to 1.96v, which is insanely high.  Since the maximum safe cache voltage is considered to be around 1.3v, that's a crazy high figure that, if actually applied, would probably fry your chip within minutes, if that. And, given that there's no way to know if the entered value is used in the calculation of *other* system voltages that are on Auto setting, that's not a test I'm willing to make.  Besides, I doubt the BIOS would even let me enter a value that high without turning on the liquid nitrogen settings.


      I think clearly only someone with corporate resources can test this properly.  But for what it's worth, I was willing to risk the following:

      Cache overclocked from 3.0Ghz to 3.8Ghz.

      Offset:  0/Auto
      Additional Turbo Voltage:  1.45v

      (I would fail to boot with additional turbo voltage any lower).


      This booted successfully.  Idle voltage at 0.735v, which is perfect, and it would ramp up only to 1.02v when running at maximum 3.8Ghz clocks (not enough for me to truly be stable, but enough to boot successfully and to demonstrate Proof Of Concept).  The difference x 4 doesn't quite match up to the total Additional Turbo Voltage setting of 1.45v, so I think some portion of it is being excluded from that division... but when changing it, when applying a delta to the Additional Turbo Voltage up or down in 0.4v increments above the 1.0v mark, it affects the actual recorded maximum cache voltage by only 0.1v pretty damn consistently.


      I hope this is enough for someone at Intel to take a look and see if the issue is being caused on their end.  It took a lot of risk and a lot of time to glean the nature of this behavior.  Please put it to good use.


      My relevant system specs, for the record:


      CPU: Intel Core i7-5930K

      Motherboard: Asus RAMPAGE V EXTREME, BIOS 2101

      Memory: G.Skill 32GB (4 x 8GB) DDR4-2666 15-15-15-35-2T at XMP settings

      Storage: Intel 750 Series 1.2TB PCI-E SSD

      Video: 2x Gigabyte Gaming G1 980 Ti in SLI, Driver 368.81

      Power Supply: EVGA Supernova P2 1200W 80+ Platinum

      OS:  Windows 10 Pro x64 Build 10586




      Processor:  4.4 GHz adaptive (1.27v total adaptive voltage per BIOS), LLC7 input 1.92v

      Processor Cache:  4.2 GHz offset +0.27v (max 1.212v under load)

      GPU SLI:  Stock voltage, 1455 MHz, 8000Mhz memory

        • 1. Re: Adaptive cache voltage - nature of bug discovered

          I suppose I should add that this subject would really only be of interest to overclockers.  Adaptive cache voltage isn't really necessary for non-overclocked systems.  Just in case you're reading this and thinking "never heard of it", heh.

          • 2. Re: Adaptive cache voltage - nature of bug discovered

            Thanks Qwinn, hope this information helps more users; I recommend you to share this information also on this forum http://forum.hwbot.org/index.php




            • 3. Re: Adaptive cache voltage - nature of bug discovered

              Hi Hellen, thanks for your response.


              Actually, after a lot more research since that post, I've discovered the following:


              1)  To me, the only practical purpose of Adaptive Cache Voltage is to reduce idle cache voltage. Turns out you can achieve that, and with even lower voltage than Adaptive Cache Voltage would get you, using C-States.  Enable them all and set package limit to C6 Non Retention States.  Gets idle cache voltage as low as 0.600v, where adaptive cache voltage doesn't seem to get it below around 0.735v.


              2)  In case someone *did* want to get Adaptive Cache Voltage anyway, I also did test a sort-of workaround using XTU.  If you boot with a low cache multiplier (say, around 35x) and a safe "additional turbo value" of around 1.25v, you should be able to boot successfully.  Then run Intel XTU and raise the multiplier.  In my case I wanted to raise it to 42.  This sort-of works... any monitoring program will tell you that the max cache multiplier at that point is 42.  AND, this bypasses the problem I discussed above - the maximum cache voltage will then be capable of going up to what you set it to in the additional turbo field.  The two reasons this isn't an ideal solution are:  the *actual* multiplier under load only goes as high as 40.  No matter what load I put it on, I couldn't get cache to actually go above 4.0Ghz in practice, even though the max multiplier is properly set to 42, and also, even if it *DID* work, it's not really a practical solution because you'd have to load XTU in the foreground every time you rebooted to reset the multiplier, which is pretty cumbersome.


              Anyway, after long conversations with the Asus people, and a thousand and one tests, I am convinced that the technical issues with adaptive cache working properly are on the Intel side.  The fact that even applying settings through Intel XTU doesn't seem to be able to get it working properly only reaffirm that.  Again, I no longer really care since C-States seems to provide an alternate solution to the issue I was trying to address, but I thought I'd post this in case Intel decides it's to their benefit to get every feature they advertise working properly.

              • 4. Re: Adaptive cache voltage - nature of bug discovered

                Hi Qwinn,


                Please let me know if there is something else I could do for you.