This is designed to be a quick overview of the most common 82580 questions we get.  This is not designed to replace a reading of the datasheet and spec update.  In fact, the datasheet and spec update are required reading and if they conflict, the datasheet and spec update are right and this page is wrong.  If you like this type of FAQ, leave us a comment and maybe we will do more of them.  Also, we may not update this page in the future so I can’t say this enough, check the datasheet and spec update!

 

 

1. Does the 82580 support EEPROMless designs?

No. The 82580 requires an EEPROM for proper operation.

 

 

2. What power supplies does the 82580 require?

3.3V, 1.8V and 1.0V.

 

 

3. Which power rails are sourced from main power?

All 82580 power should be derived from AUX power.

 

 

4. Which ports are available on the dual port SKU?

Ports 0 and 1 are available on the dual port SKU.

 

 

5. Are the MAC Addresses still automatically calculated like on the 82576?

No. Each MAC address must be programmed individually.

 

 

6. Which Ethernet interfaces does the Intel device driver support for the 82580?

As of this release, the following Ethernet interfaces are supported:

• Windows NDIS*- SerDes, Fiber and Copper. SGMII is not currently supported.

• Linux* - SerDes, Fiber, Copper and SGMII are supported.

 

 

7. Does the 82580 support Pre-boot?

Yes. It supports iSCSI, PXE and UEFI.

 

 

8. Which Ethernet interfaces does the Pre-boot environment support?

As of this release, the following Ethernet interfaces are supported:

• iSCSI* - SerDes, Fiber and Copper are supported in Windows and Linux. SGMII is not currently supported.

• PXE* - SerDes, Fiber, Copper and SGMII are all supported in Windows and Linux.

• UEFI* - SerDes, Fiber, Copper and SGMII are all supported in Windows and Linux.

 

 

9. What Device ID’s are supported by the 82580?

 

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10. Why do I see (4) devices with the same device ID?

Each port of the 82580 is considered a unique device and has its own Device ID. An 82580 with all 4 ports configured to the same interface type will show 4 Device IDs all with the same value.

 

 

11. What’s the Device ID of the 82580 if each port is a different Ethernet type?

Device ID’s are defined ‘per port’ and not per silicon chip. This means there is no mixed-port type device ID; just one device ID per port. Each port can be configured for one the 5 Ethernet interface types (Copper, Fiber, Kx, Bx or SGMII).

 

 

12. Are different device drivers needed for each Ethernet Interface type?

No. The 82580 device driver supports (or will support) each of the Ethernet Interface types.

 

 

13. Does the Intel device driver support the 1588 protocol standard?

Though the 82580 supports the 1588 protocol standard, the device driver does not. Each application is unique and requires customers to develop their own custom driver to support this feature.

 

 

14. Can I/O addressing be disabled in the 82580?

Yes. The 82580 has a ‘disable I/O mode’ feature for disabling the allocation of I/O port resources for use in systems and environments (such as Windows and UEFI) where this feature is either not desirable or not supported. Legacy environment components (such as DOS, PXE and iSCSI Boot) which previously required I/O port access can now either use I/O mode if available or an alternate mechanism if I/O mode is disabled.

 

 

15. Can I monitor the 82580 temperature through the TSENSP/Z pins?

Yes and No. The TSENSP/Z pins can be used to measure temperature, but should only be used in the lab for measurement/characterization purposes. These pins should not be used in actual product systems to monitor and react to temperature changes. Reference the Thermal Diode section of the Thermal Management chapter of the Intel® 82580 Quad/Dual Gigabit Ethernet Controller Datasheet for details.

 

 

16. What are the SMbus Slave addresses?

For the dev_starter EEPROM images that support SMBus manageability, the SMBus addresses are defined as:

 

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17. How long can the Ethernet MDI trace lengths be?

In general, 82580 Ethernet trace lengths can be up to 8 inches, but will be dependent upon the actual design and layout. Reference the Intel Long MDI Traces Design and Layout Guide for details. An NDA agreement is required to access this document.

 

18. Why do I see valid MAC addresses in the dev_starter EEPROM images?

Default MAC addresses do exist in the 82580 dev_starter images so that users have working MAC addresses for design testing and validation. These MAC addresses should be overwritten with real MAC address values for production units. The addresses are:

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19. How do I interpret the chip markings on my 82580?

Reference the Marking Diagram section in the Intel® 82580 Quad/Dual GbE Controller Specupdate document for a description of chip markings.

 

 

20. Does the 82580 have any ESD suppression on the MDI lines?

Yes. ESD suppression is built-in to the 82580.

 

 

21. I’m not seeing the ‘MDI flip chip’ option that was available on the 82576. Does it exist on the 82580?

No. The 82580 does not support the MDI flip chip feature. This means that port 0 can not be swapped with port 3, and port 1 can not be swapped with port 2.

 

 

22. The 82580 Reference Schematic doesn’t show a 1.8V on the system side magnetic center tap? Is this still required?

No. The 1.8V bias is not required for the 82580. The 82580’s output buffers are internally biased with a voltage mode driver.

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23. How do I get the Linux driver?

The Linux driver for the 82580 can be downloaded from the Sourceforge web site, http://sourceforge.net/projects/e1000/files/ and support.intel.com.

 

 

24. What do I do with unused pins?

Unused pins can be left unconnected, except for the manageability pins of the SMBus and NC-SI Bus. These pins must be pulled-up. Reference the Intel® 82580 Quad/Dual GbE Controller Checklists document for detail.

 

 

25. Can other devices be connected to the 82580 SMBus?

For best performance, each 82580 should have itsown dedicated SMBus link to the SMBus master device.

 

 

26. Can the Quad port dev_starter EEPROM images be used on a Dual-Port device or dual port configured Quad port device?

Yes. For a Quad-port device that’s configured as only a Dual-port, it is also recommended that bits [11:10] in Words 0x0E (port 2) and 0x120 (port 3) be set to 11b to actually disable ports 2 and 3, respectively.

 

 

27. Can the latest EEPROM images be used on A0 silicon?

No. A0 and A1 EEPROM images are not interchangeable with A0 and A1 Silicon. A0 silicon requires A0 images and A1 silicon requires A1 images.

 

A0 images can be found in CDI/IDL in:

o Intel® 82580 Gigabit Ethernet Controller SVK – Silicon Sample Kit - 14 Aug-2009; Doc ID #428529

 

A1 images can be found in CDI/IDL in:

o Intel® 82580 Gigabit Ethernet Controller – EEPROM Images – Rev 3.19 02-Feb-2010; Doc ID #441658

 

Contact your Intel representative for sample EEPROM images for the 82580.  An NDA agreement is required to access this information.