It is because you want your network product to work seamlessly with other different manufacturers networking equipment. What does it really mean though to pass the IEEE 802.3® tests though? Does it guarantee that your network card or LOM (Lan on Motherboard) is going to actually work? There are no guarantees in life and this is one of them! However, if you have a NIC from Intel and NIC from another manufacturer and both of them pass all of the IEEE tests then there is a very high probability that both will pass traffic at near line speed over the 100m required by the spec and they will play nicely with each other in the networking sandbox. The spec is robust enough that even a very badly designed NIC would still pass traffic at a reasonable speed at less than 100m. The spec for 10 Megabit is so robust you can practically use a chain link fence as your network cable. In fact, Cisco* has demonstrated 10Mb over barbed wire! The point is that you can fail some 10 Megabit IEEE tests and still link up at 200m. The gigabit tests are more sensitive to failure though.
Here at Intel we design our NIC’s and LOM’s to be 100% conformant to the IEEE spec. If our results are marginal in performance to a particular IEEE test parameter then it would go into a spec update. To help assure that our customers’ designs are interoperable, we have set up IEEE test labs in 3 sites around the world where we validate a multitude of customer designs. Some designs are better than others and you can see the direct results of those design decisions in the IEEE test results. It is possible to have a couple of IEEE tests marginally fail but still perform well past 100m in bit error rate testing.
Over the next few months I will be writing a series of blogs comparing different types of designs and how they can impact the IEEE tests which ultimately impact how well your product will work within a LAN. In addition I am working with a core group of engineer experts with over 50 years of network experience to completely review every single design and placement requirement we have and revalidate them for our current and future products. We will be experimenting with EMI, near field noise, electrostatic discharge, etc… to further tune our recommendations to help designers build better boards. Designing the analog front end for LAN into a noisy board optimized for digital traffic is no small feat!
For our next generation products our design guidance is only getting better and more accurate. If you follow Intel’s schematic and layout design guidelines that are available to our customers under NDA then you will have a very high probability of passing all of these IEEE tests. This will lead to a better experience for the end user and provide a solid foundation for an Ethernet connection that just works