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K_Lloyd

Growing EXcitement over Nehalem EX

Posted by K_Lloyd in The Data Stack on Jul 27, 2009 5:22:46 PM

I talk with a lot of customers.  Since the initial disclosure, there has been a groundswell of EXcitement(bad geek pun) for the upcoming Nehalem EX launch.  I think this is primarily driven by the realization of just how significant the Xeon 5500 ( aka Nehalem EP ) product has been.  Xeon 5500 delivered an unprecedented leap in Xeon performance, the biggest ever.  Things are pretty good if you can get 30-40% per generation.  Nehalem EP was 2-3 times the performance of the previous generation.

 

Nehalem EX looks well positioned to take this crown away, delivering the biggest leap ever.

 

Nehalem EX arrives in the box with:

  • Up to eight cores / 16 threads with hyper-threading and 24MB of cache
  • Up to 9x the memory bandwidth over  and up to 64 memory slots in a four socket platform
  • Over 15 eight-Socket+ designs from 8 OEMs coming
  • New RAS technology - Machine Check Architecture (MCA) – formerly reserved for high end Itanium systems

 

This is exciting from a performance perspective, but even more exciting as an opportunity for consolidation and migration.

 

Large enterprise applications – ERP, CRM, Decision support have been the domain of the scale up SMP architecture.  Clouds and grids are making progress, but these applications are often easiest to manage on a single image.  In order to meet service level requirements ( like completion of close in under 6 hours ) IT managers have resorted to 16, 32, even 64 processor RISC systems.  This scale up domain has been mostly outside the scope of Xeon systems.

 

Nehalem EX with 64 threads in a four way box changes the math.  Systems requirements that forced scale on expensive proprietary RISC architectures can now run on a Xeon platform.  With systems up to 128 threads there are very few enterprise applications that will not fit into this box

It is a one-two punch.  SMP scale and mainframe class reliability features.  The opportunity to migrate of legacy RISC to Xeon is upon us.

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