Hi Darence,
I don't know about POPSHM, but in RCCE, shared off-chip memory is handled as non-cacheable in L1 and L2 (assuming that hasn't changed from previous versions). I think the file you need to look at is SCC_API.c in the RCCE tree.
Hi Darence,
the original SccKit had three special devices /dev/rckncm (non-cached mode), /dev/rckmpb (MPBT mode), and /dev/rckdcm (definitively cached mode). Thus, RCCE and others can only access shared memory in these modes. For our project we added /dev/rckmpbwt (for MPBT+write through) by recompiling the whole system. You use them by opening the device and using it as file in mmap(). The offset parameter of mmap is the physical address that you want to access, but be careful with the LUT mapping, otherwise different cores see different memory at the same physical address.
The SMC project has a nicer approach. They extended the mprotect system call so that you can change the mode after mmap() to any desired variant. Unfortunately, their approach to modify mprotect is quite elaborate. I would like to have this feature either in the standard SccKit or as a loadable kernel module. That would lower the entry barrier 
I don't know what devices are available in SccKit-1.4.2.
POPSHM memory is non-cached. It depends on SCC_API.c as well.
Thanks for the answers, guys.
Just one more question: does the dependence on SCC_API.c you mentioned mean that you can actually change the flags by adapting some code in that file?
What type of flags do you mean? I think it depends on what you want to do. You can certainly open a different device or change the address space mappings created by mmap.
