Hello,
I'd like to know very briefly what are the instruction sets SSE 4.1 and SSE 4.2 and whether Sandy Bridge E5 architecture has them or not.
Thanks a lot,
Hi
you have the short explain here:
http://en.wikipedia.org/wiki/SSE4
About E5 if you have O/S Linux, use command shell
cat /proc/cpuinfo
or dmidecode -t4
It's wrote if you have .
I don't have this model under my hand for answer more precise
Regards
Ok, so I understand that AVX is an enhanced version of SSE, so that I assume that brand new Sandy Bridge cpu's fully support SSE intsructions, right?
Hi
(Sandy Bridge several model exist.... your first question is about SSE4)
Unfortunaly for AVX it's could be more complex you have (AVX,AVX-I,AVX-2)
Better you read here
http://software.intel.com/sites/products/documentation/hpc/composerxe/en-us/2011Update/cpp/lin/index.htm
Chapter compiler reference
--code generation options
--arch
Example in topic related flag CORE-AVX-I
You read between the lines
(processors in process technology smaller than 32nm)
So appropriated only to IVY ....
etc ....
added:
To be sure ,I have verified small machine
Even the entry of series model G6xx Sandy have SSE 4.1 SSE 4.2
Regards
So ok, let me rephrase my question:
Does the Intel Sandy Bridge E5-2650 model support the SSE 4.1 and SSE 4.2 instruction set?
Thanks,
Hi
www.cpu-world.com/CPUs/Xeon/Intel-Xeon E5-2650.html
you see ? but I think probably supported..
Regards
Great. A bit weird that this info has to be found anywhere but in www.intel.com but anyway,...
;-)
Thanks a lot,

