Success! Subscription added.
Success! Subscription removed.
Sorry, you must verify to complete this action. Please click the verification link in your email. You may re-send via your profile.
Icon | Title | Posts | Recent Message Time Column |
---|---|---|---|
Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
| 95308 Posts | 04-19-2024 01:56 AM | |
FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
| 28882 Posts | 04-18-2024 11:37 PM | |
FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
| 27296 Posts | 04-19-2024 02:13 AM | |
Intel® FPGA University Program
University Program Material, Education Boards, and Laboratory Exercises
| 4956 Posts | 04-07-2024 07:22 PM | |
Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
| 2529 Posts | 04-15-2024 11:41 PM | |
Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
| 52753 Posts | 04-19-2024 02:39 AM | |
Intel® SoC FPGA Embedded Development Suite
Support for SoC FPGA Software Development, SoC FPGA HPS Architecture, HPS SoC Boot and Configuration, Operating Systems
| 2531 Posts | 04-17-2024 03:50 AM | |
Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
| 82497 Posts | 04-19-2024 02:37 AM | |
Intel® High Level Design
Support for Intel® High Level Synthesis Compiler, DSP Builder, OneAPI for Intel® FPGAs, Intel® FPGA SDK for OpenCL™
| 3520 Posts | 04-18-2024 08:22 AM | |
Intel® FPGA Software Installation & Licensing
Installation and Licensing that’s includes Intel Quartus® Prime software, ModelSim* - Intel FPGA Edition software, Nios® II Embedded Design Suite on Windows or Linux operating systems.
| 5705 Posts | 04-18-2024 11:23 PM | |
FPGA Wiki
Welcome to the Intel FPGA Wiki
| 364 Posts | 11-03-2022 01:29 PM |
N6000-PL MAX10 Build by Beginner_in_FPGA 04-15-2024 0 18 |
Nios V uC/TCP IP Failed by JLee25 04-17-2024 0 18 |
New edition CVGT Board just arrived from Terasic. My already working programming script fails by GordWait 04-18-2024 0 17 |
Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.
Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.
For more complete information about compiler optimizations, see our Optimization Notice.