Updated SR-IOV Primer now Available
I began as the TME (Technical Marketing Engineer) for the Intel® Ethernet Virtualization Technologies late in 2007. Spent the first months trying to learn what the technologies --Virtual Machine Device Queues (VMDq) and Single Root I/O Virtualization (SR-IOV) -- were and how they worked. I find the best way to learn something is to teach it, and one way TMEs ‘teach’ is to write white papers. I wrote a paper or two on VMDq which was the ‘hot’ topic at the time.
In mid 2008, I began writing a document designed to give a mid-level overview of what SR-IOV is, why it was created and how it works. In December of 2008 I published the PCI-SIG* SR-IOV Primer paper. I learned a lot while writing it.
Since then, this document seems to have become popular. If you search on Google* for “SR-IOV,” it will come up as the 1st in the list. (#4 on Bing* and Yahoo*, and #1 on ASK*). Does this mean that millions of people are reading it? I don’t know – all I know is it is review time around here at Intel and it seemed like a good idea to mention it. J
So back to seriousness – the document has become a bit dated, and my understanding of the technology has improved as Intel continues to add more support in our Ethernet controllers and I continue to speak with folks much brighter than I am. So I have updated the Primer doc for your reading pleasure. The core content is the same, filled out a few sections more fully, added some new content and made many new pretty pictures.
The doc is here, enjoy!
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