Intel Communities: Message List

Re: Memory consistency issue using RCCE

webadmin@intel.com — Fri, 19 Apr 2013 12:15:06 GMT

Hi Nicolas,

WCB = Write combine buffer.

If you looking to RCCE_put.c code, you will find the RCCE_put() not using RCCE_fool_write_combine_buffer to flush the data, while RCCE_put_char() (which used by RCCE_flag_write()) flush the data by using RCCE_fool_write_combine_buffer to make sure the data already written in MPB.

Other way, I think to implement those function based on no-cache mode.

Regards

Hayder

Re: Memory consistency issue using RCCE

webadmin@intel.com — Fri, 19 Apr 2013 08:27:53 GMT

Hi,

I have already got like this issue before in my work. I got impression, the problem is the conflicts between

RCCE_flag_write() and RCCE_put(), because there is no flush for WCB in RCCE_put() to ensure the data gets flushed.

My suggestion is to add this:

*(int *)RCCE_fool_write_combine_buffer = 1;

after each RCCU_put() to make sure the WCB gets flushed, or implement your application based on non-cache mode.

I hope this help.

Hayder

Write Combine Buffer status

webadmin@intel.com — Mon, 25 Feb 2013 15:24:11 GMT

Hi,

Is there a way to know the write combine buffer when is full or flushing?

Or, does hardware support register to know status of WCB?

Thanks in Advance

Re: Linked data structures in shared off-chip memory

webadmin@intel.com — Thu, 04 Oct 2012 09:59:15 GMT

First of all, Thanks for this nice post.

>>Allocate a "physical remapping" area (i.e., a set of LUT slots) per core. Map in this range, on all cores, at the same virtual address. Configure the LUTs to point to the same system memory. Now, you can exchange virtual addresses freely across cores (as long as they refer to objects in this special shared section).<<

I have thought in advance about this idea, but I got impression that's a poor and rather restrictive solution.

Could you give us more details about it? if possible with examples.

Regards

Hayder

Re: Linked data structures in shared off-chip memory

webadmin@intel.com — Sat, 22 Sep 2012 22:09:14 GMT

You can't using pointer approach, because the virtual address is not valid for other cores. The SCC is like cluster on chip and it is not follow real shared memory model. That means map shared memory are into every process on the system at different virtual address. So, you need using techniques of cluster programming model to passing data from core to other.

Re: A non-cacheable block of memory

webadmin@intel.com — Fri, 21 Sep 2012 15:27:44 GMT

I have already installed the code and really nice tool. I use sccKit 1.4.2.2 and linux kernel 2.6.38.3.

If you want to install, you should use buildroot-2011.05 and following the instruction SMC paper. Please, don't forget to change the address of sys_call_table.

Re: A non-cacheable block of memory

webadmin@intel.com — Fri, 21 Sep 2012 13:12:54 GMT

Thanks for your response.

Other way, we could use mprotect mechanism which support by SMC group to set the block of memory as Cacheable or UC.

Re: Cross-Compiler Update

webadmin@intel.com — Tue, 04 Sep 2012 06:08:21 GMT

Hi Edward,

I don't know exactly why you got at this error, but I think there is mistake when you use this compiler.

If you could posting the procedure of compile your code and the message error.

Any way, I attached picture that contained the procedure of test the compiler and you could follow it and check your code.

1. Add your new compiler to your Path by using:

export PATH=$PATH:/(directory of cross compiler)/build/install/i586-unknown-linux-gnu/bin

2. To be sure the compiler in your Path:

which i586-unknown-linux-gnu-gcc

3. to compile your code use i586-unknown-linux-gnu-gcc or i586-unknown-linux-gnu-g++

4. You could also find in attached file the output of run hello world program.

BTY, the program run in MCPC and SCC.

Regards!

Hayder

Re: Cross-Compiler Update

webadmin@intel.com — Mon, 03 Sep 2012 06:09:54 GMT

Hi Edward,

First of all, you need to install Crosstool-ng, and you could download from this website:

http://crosstool-ng.org/.

You could tracking those instructions which found in this tutorials to understand how to build cross-compiler:

http://www.aclevername.com/articles/linux-xilinx-tutorial/crosstool-ng-1.3.2.html

http://getglitched.com/?page_id=253

Other way, I attached the configuration file (I got it from Isaías and modified it) for crosstool-ng 1.11.3, that will build a 4.4.6 toolchain with C/C++ and fortran. It works and you could just download it and copy the contents of file and place it in the .config file under your crosstool-ng working directory and instruct crosstool-ng to build the compiler by using ./ct-ng build.

BTY, the .config file is already existing in crosstool directory, just you need modified it.

Do not hesitate to ask more questions.

Regards!

Hayder

Re: Cross-Compiler Update

webadmin@intel.com — Mon, 30 Jul 2012 10:03:30 GMT

Hi Edward,

You have two options to use new version of gcc on SCC:

1) You should be able to build a custom linux that has new version of gcc, or using sccKit 1.4.2.2 which uses buildroot 2011.11 and comes with kernel 3.1.4 that its default cross-gcc seems to be gcc-4.4.6.

2) You could generate a new version of gcc by using crosstool-ng.

Hopefully, this reply help you.